Hardware information

The examples and benchmarks here were generated using:

Version info

using InteractiveUtils
versioninfo()

Julia Version 1.10.0
Commit 3120989f39b (2023-12-25 18:01 UTC)
Build Info:
  Official https://julialang.org/ release
Platform Info:
  OS: Linux (x86_64-linux-gnu)
  CPU: 40 × Intel(R) Xeon(R) Silver 4114 CPU @ 2.20GHz
  WORD_SIZE: 64
  LIBM: libopenlibm
  LLVM: libLLVM-15.0.7 (ORCJIT, skylake-avx512)
  Threads: 11 on 40 virtual cores
Environment:
  JULIA_NUM_THREADS = 8

Topology

using Hwloc
topology_info()

Machine: 1 (31.01 GB)
 Package: 2 (15.27 GB)
  Bridge: 15
   PCI_Device: 199
    OS_Device: 24
     NUMANode: 2 (15.27 GB)
      L3Cache: 2 (13.75 MB)
       L2Cache: 20 (1.0 MB)
        L1Cache: 20 (32.0 kB)
         Core: 20
          PU: 40

CPU

using CpuId
printstyled(cpuinfo())

| Cpu Property       | Value                                                      |
|:------------------ |:---------------------------------------------------------- |
| Brand              | Intel(R) Xeon(R) Silver 4114 CPU @ 2.20GHz                 |
| Vendor             | :Intel                                                     |
| Architecture       | :Skylake                                                   |
| Model              | Family: 0x06, Model: 0x55, Stepping: 0x04, Type: 0x00      |
| Cores              | 10 physical cores, 20 logical cores (on executing CPU)     |
|                    | Hyperthreading hardware capability detected                |
| Clock Frequencies  | 2200 / 3000 MHz (base/max), 100 MHz bus                    |
| Data Cache         | Level 1:3 : (32, 1024, 14080) kbytes                       |
|                    | 64 byte cache line size                                    |
| Address Size       | 48 bits virtual, 46 bits physical                          |
| SIMD               | 512 bit = 64 byte max. SIMD vector size                    |
| Time Stamp Counter | TSC is accessible via `rdtsc`                              |
|                    | TSC runs at constant rate (invariant from clock frequency) |
| Perf. Monitoring   | Performance Monitoring Counters (PMC) revision 4           |
|                    | Available hardware counters per logical core:              |
|                    | 3 fixed-function counters of 48 bit width                  |
|                    | 4 general-purpose counters of 48 bit width                 |
| Hypervisor         | No                                                         |